Mitsubishi Q03UDVCPU MELSEC-Q CPU Module
MPNQ03UDVCPU
MITSUBISHI Q03UDVCPU CPU MODULE
$1,205.43 – $1,242.00Ref. price · indicative, final on quote
StockContact for availability
MOQ1 pcs
Sourced new & surplus through independent channelsListing updated Jun 2026
Specifications
| Parameter | Value |
|---|---|
| Over voltage category | II or less |
| DC 5 v internal current consumption | 0.58 A (single CPU unit) / 0.6 A (when extended SRAM cassette is installed) |
| Latch (power outage hold) range | L 0 to 8191 (default 8192 points) [latch range can be set for B, F, V, T, ST, C, D, W] |
| Allowable momentary power failure time | Depends on power supply unit |
| Communication mode | Full duplex / half duplex |
| High speed communication area between multiple CPUs | 32 KB |
| Installation location | In the control panel |
| Number of connections | Socket communication, MELSOFT connection, MC protocol total 16 pieces 1 for FTP |
| Storage ambient temperature | -25 to 75 ° C (-20 to 75 ° C when system includes AnS / A series unit) |
| Operating ambient temperature | 0 to 55 ° C |
| Pollution degree | 2 or less |
| Storage ambient humidity | 5 to 95% RH, non condensing (10 to 90% RH when the system includes AnS / A series unit) |
All specifications+71 ▾
| Parameter | Value |
|---|---|
| Ambient operating humidity | 5 to 95% RH, non condensing (10 to 90% RH when the system includes AnS / A series unit) |
| When there is continuous vibration | Frequency: 5 to 8.4 Hz, One amplitude: 1.75 mm Frequency: 8.4 to 150 Hz, Constant acceleration: 4.9 m / s 2 |
| Depth | 115 mm |
| Width | 27.4 mm |
| Shipping weight | 1.2 Kg |
| External dimensions height | 98 mm |
| Standard RAM | 323 books |
| Standard ROM | 256 |
| Standard ROM (Drive 4) | 1025.5 KB |
| CPU shared memory QCPU standard area | 8 KB |
| Standard RAM (Drive 3) when the extended SRAM cassette is not used | 192 KB |
| Mass | 0.20 kg |
| SDHC | Root folder: Maximum 65535 books Subdirectory: Up to 65534 books |
| Refresh | 2048 pieces |
| Timer [T] | Default 2048 points (T 0 to 2047) (Shared with low-speed timer / high-speed timer) (Changeable) Low-speed timer / high-speed timer specified by instruction Set the measurement unit of low-speed timer / high-speed timer by parameter (low-speed timer: 1 to 1000 ms , 1 ms increment, default 100 ms) (High-speed timer: 0.01 to 100 ms, 0.01 ms increments, default 10.0 ms) |
| Counter [C] | Normal counter: default 1024 points (C 0 ~ 1023) (changeable) |
| Pointer [P] | 4096 points (P 0 ~ 4095) (Number of device points fixed) Use range of local pointer / common pointer can be set by parameter |
| Device class | Class I |
| Manufacturer | Mitsubishi Electric |
| Constant scan | 0.5 - 2000 ms (Can be set in 0.1 ms increments) |
| Use elevation | 0 to 2000 m |
| Clock function | Year, month, day, hour, minute, second, day of the week (leap year automatic discrimination) accuracy: -2.97 ~ + 3.75s (. TYP + 0.39s) / d at 0 ? accuracy: -2.97 ~ + 3.75s (TYP + . 0.39 s) / d at 25 ° C Accuracy: -12.77 to + 2.13 s (TYP. -5.32 s) / d at 55 ° C |
| Control method | Stored program iteration operation |
| Edge relay [V] | Default 2048 points (V 0 to 2047) (changeable) |
| Link relay [B] | Default 8192 points (B 0 to 1 FFF) (changeable) |
| Step relay [S] | Default 8192 points (S0 to 8191) (changeable) |
| Use atmosphere | No corrosive gas |
| Annunciator [F] | Default 2048 points (F 0 to 2047) (changeable) |
| Latch relay [L] | Default 8192 points (L0 to 8191) (changeable) |
| Program capacity | 30K steps (120K bytes) |
| Data register [D] | Default 13312 points (D0 to 13311) (changeable) |
| Impact resistance | Meets JIS B 3502, IEC 61131-2 (147 m / s 2 , 3 times in each of X, Y and Z directions) |
| Link register [W] | Default 8192 points (W 0 to 1 FFF) (changeable) |
| Special relay [SM] | 2048 points (SM 0 to 2047) (Device number is fixed) |
| Estimated lead time | Usually ships in 1 - 10 working days. |
| Function input [FX] | 16 points (FX 0 to F) (Device number is fixed) |
| Memory card (SD) SD | Root folder: Up to 512 subdirectories: Maximum 65534 |
| RUN (PAUSE contact) | One point of each RUN / PAUSE contact can be set from X 0 to 1 FFF |
| Transmission method | Baseband |
| Function output [FY] | 16 points (FY 0 to F) (the number of device points is fixed) |
| Interrupt pointer [I] | 256 points (I 0 to 255) (the number of device points is fixed) Periodic interval of system interrupt pointer I 28 to 31 can be set by parameter (0.5 to 1000.0 ms, 0.5 ms increments) Default I 28: 100 ms, I 29: 40 ms, I 30: 20 ms , I31: 10 ms |
| Special register [SD] | 2048 points (SD 0 to 2047) (the number of device points is fixed) |
| Function register [FD] | 5 points (FD 0 ~ 4) (Device number is fixed) |
| Integration timer [ST] | Default 0 point (Shared with low speed integration timer / high speed integration timer) (Changeable) Low speed integration timer / high speed integration timer is specified by instruction Set the measurement unit of low speed integration timer / high speed integration timer by parameter (low speed integration timer: 1 ~ 1000 ms, 1 ms increment, default 100 ms) (High-speed integration timer: 0.01 to 100 ms, 0.01 ms increments, default 10.0 ms) |
| Link special relay [SB] | Default 2048 points (SB 0 to 7 FF) (changeable) |
| Processing speed LD x 0 | 1.9 ns |
| When using q4 MCA - 1 MBS | 622592 points (ZR 0 ~ 622591) No need to switch blocks |
| When using q4 MCA - 2 MBS | 1146880 points (ZR 0 to 1146879) Block switching not required |
| When using q4 MCA - 4 MBS | 2195456 points (ZR 0 to 2195455) No block switching required |
| When using q4 MCA - 8 MBS | 4292608 points (ZR 0 to 4292607) Block switching not required |
| Extended data register [D] | Default 0 point (changeable) |
| Extended link register [W] | Default 0 point (changeable) |
| Link special register [SW] | Default 2048 points (SW 0 to 7 FF) (changeable) |
| Memory card (SD) (Drive 2) | Installed SD memory card (SD / SDHC) capacity (32 GB maximum) |
| Processing speed MOV d 0 d 1 | 3.9 ns |
| Hub and node longest distance | 100 m |
| Input (output control method) | Refresh method (Direct access input / output possible by specifying direct access input / output (DX, DY)) |
| Number of input (output points) | 4096 points (X / Y 0 to FFF) |
| Number of input (output devices) | 8192 points (X / Y 0 to 1 FFF) |
| When using extended SRAM cassette | Capacity when extended SRAM cassette is not used + Capacity of extended SRAM cassette (Extended SRAM cassette can be up to 8 Mbytes) |
| Intelligent functional unit device | Device specification that directly accesses buffer memory of intelligent function module Format: U □□ \ G □□ |
| Memory capacity program memory (drive 0) | 120 KB |
| Number of device points internal relay [M] | Default 9216 points (M0 to 9215) (changeable) |
| Maximum number of stored files program memory | 124 |
| Programming language sequence control language | Relay symbol word, logic symbolic word, MELSAP 3 (SFC), MELSAP-L, function block, structured text (ST) |
| Index register (general operation register [Z]) | Up to 20 points (Z 0 ~ 19) |
| Transmission specification data transmission speed | 100/10 Mbps |
| File register [R] when the extended SRAM cassette is not used | 32768 points (R 0 ~ 32767) Maximum 98304 points can be used by block changeover |
| File register [ZR] when the extended SRAM cassette is not used | 98304 points (ZR 0 to 98303) No block switching required |
| Index register [Z] (when ZR device 32-bit qualifier is specified) | Up to 10 points (Z0 to 18) (Use index register [Z] as double word) |
| Intelligent functional unit parameter maximum setting number initial setting | 4096 pieces |
MPN
Q03UDVCPU