BOM / RFQ

Siemens 6ES7313-5BE00-0AB0 — PLCs (Programmable Logic Controllers)

Siemens 6ES7313-5BE00-0AB0 S7-300 CPU, 248 I/O, MPI, FBD/LAD

MPN6ES7313-5BE00-0AB0

End of Life

Siemens S7-300 CPU module, 6ES7313-5BE00-0AB0, 248 inputs / 124 outputs, 32 kB memory, MPI, FBD, LAD, SCL, STL, GRAPH, HiGraph.

$422.22Ref. price · indicative, final on quote

Add to RFQ

Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Jul 2026

Specifications

6ES7313-5BE00-0AB0 — I/O
Parameter	Value
Digital inputs	24
Digital outputs	16
Expandable	No
Input data area	248
Output data area	124

6ES7313-5BE00-0AB0 — Processor & Memory
Parameter	Value
Execution time, bit operations (typ.)	0.1 µs
Execution time, word operations (typ.)	0.5 µs
Execution time, floating-point arithmetic (typ.)	15 µs
Size, max.	16 kbyte

6ES7313-5BE00-0AB0 — Programming
Parameter	Value
Programming language: FBD	Yes
Programming language: LAD	Yes
Programming language: SCL	Yes

6ES7313-5BE00-0AB0 — Electrical
Parameter	Value
Rated value (DC)	24 V
Current consumption (rated)	700 mA
Permissible range, lower limit (DC)	20.4 V
Permissible range, upper limit (DC)	28.8 V
Power loss (typ.)	14 W
Short-circuit protection	Yes; Clocked electronically

6ES7313-5BE00-0AB0 — Mechanical
Parameter	Value
Width	120 mm
Height	125 mm
Depth	130 mm
Weight (approx.)	660 g

6ES7313-5BE00-0AB0 — Specifications
Parameter	Value
Expandable FEPROM	Yes; with Micro Memory Card (MMC)

Product details

CPU specification note

Siemens 6ES7313-5BE00-0AB0 supports programming in FBD, LAD, SCL, STL, GRAPH, and HiGraph. Integrated 32 kbyte memory holds both program and data; an additional 16 kbyte expansion is available for function module specific uses. Digital I/O address range covers 248 inputs and 124 outputs, with analog inputs accepting 0 to 10 V, 0 to 20 mA, Pt100, and resistance up to 600 ohms. Communication is via MPI plus optional CP modules: up to 1 via CP, 2 for LAN, and 4 for point-to-point links. The CPU is not galvanically isolated from the backplane — reference potential is shared, so panel grounding must account for that.